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2.3 ghz to 2.4 ghz wimax power amplifier adl5570 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2007 analog devices, inc. all rights reserved. features fixed gain of 29 db operation from 2.3 ghz to 2.4 ghz evm 3% at p out = 25 dbm with 16 qam ofdma input internally matched to 50 power supply: 3.2 v to 4.2 v quiescent current 130 ma in high power mode 70 ma in low power mode power-added efficiency (pae): 20% multiple operating modes to reduce battery drain low power mode: 100 ma standby mode: 1ma sleep mode: <1 a applications wimax/wibro mobile terminals functional block diagram 06729-001 rfout v cc1 cflt stby vreg mode v cc2 om rfin first stage second stage third stage im1 im2 im3 bias_2 bias_1 bias_3 figure 1. general description the adl5570 is a high linearity 2.3 ghz to 2.4 ghz power amplifier designed for wimax terminals using tdd operation at a duty cycle of 31%. with a gain of 29 db and an output compression point of 31 dbm at 2.35 ghz, it can operate at an output power level up to 26 dbm while maintaining an evm of 3% (ofdm 16 or 64 qam) with a supply voltage of 3.5 v. pae is 20% @ p out = 25 dbm. the adl5570 rf input is matched on-chip and provides an input return loss of less than ?10 db. the open-collector output is externally matched with strip-line and external shunt capacitance. the adl5570 operates over a supply voltage range from 3.2 v to 4.2 v with a supply current of 440 ma burst rms when delivering 25 dbm (3.5 v supply). a low power mode is also available for operation at power levels of 10 dbm with optimized operating and quiescent currents of 100 ma and 70 ma, respectively. a standby mode is available that reduces the quiescent current to 1 ma, which is useful when a tdd terminal is receiving data. the adl5570 is fabricated in a gaas hbt process and is packaged in a 4 mm 4 mm, 16-lead, pb-free rohs-compliant lfcsp that uses an exposed paddle for excellent thermal impedance. it operates from ?40c to +85c.
adl5570 rev. 0 | page 2 of 12 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 v cc = 3.5 v .................................................................................... 3 absolute maximum ratings ............................................................ 4 esd caution .................................................................................. 4 pin configuration and function descriptions ............................. 5 typical performance characteristics ............................................. 6 applications ........................................................................................8 basic connections .........................................................................8 64 qam ofdma performance ..................................................9 power-added efficiency ...............................................................9 evaluation board ............................................................................ 10 measurement setup using the adl5570 evaluation board ........................................................................ 11 outline dimensions ....................................................................... 12 ordering guide .......................................................................... 12 revision history 5/07rev. 0: initial version
adl5570 rev. 0 | page 3 of 12 specifications v cc = 3.5 v t a = 25c, 1024 fft, 16 qam ofdma modulated carrier, 10 mhz channel bw, 16 qam, z l = 50 , mode = 0 v, stby = 0 v, vreg = 2.85 v, 31% duty cycle, unless otherwise noted. table 1. parameter conditions min typ max unit frequency range 2.3 2.4 ghz linear output power mode = 0 v, 16 qam, evm 3% 25 dbm mode = 2.5 v, 16 qam, evm 3% 10 dbm gain 29 db vs. frequency 5 mhz 0.1 db vs. temperature ?40c t a +85c 1.5 db vs. supply 3.2 v to 4.2 v 0.5 db op1db unmodulated input 31 dbm evm p out = 25 dbm 3 % rms input return loss 10 db wibro spectral mask @ p out = 25 dbm (carrier offsets scaled to 10 mhz bw signal) 1 5.45 mhz carrier offset 36 dbr 10.9 mhz carrier offset 42 dbr 15.12 mhz carrier offset 48 dbr 20.26 mhz carrier offset 52 dbr fcc spectral mask @ p out = 25 dbm 5 mhz carrier offset 36 dbr 6 mhz carrier offset 38 dbr 10.5 mhz carrier offset 42 dbr 20 mhz carrier offset 52 dbr harmonic distortion 43 dbc power supply interface v cc = 3.5 v supply current p out = 25 dbm, mode = 0 v 440 ma p out = 10 dbm, mode = 2.5 v 100 ma pae p out = 25 dbm, mode = 0 v 20 % standby mode vreg = 2.85 v, stby = 2.5 v 1 ma sleep mode vreg = 0 v 10 a turn on/off time 1 s vswr survivability 10:1 1 ofdma carrier, 16 qam, 10 mhz channel bw, 1024 fft.
adl5570 rev. 0 | page 4 of 12 absolute maximum ratings table 2. parameter rating supply voltage v cc 5.0 v vreg 3 v stby 3 v mode 3 v rfout (modulatedhigh power mode) 1 29 dbm output load vswr 10:1 operating temperature range ?40c to +85c storage temperature range ?65c to +150c maximum solder reflow temperature 260c (30 sec) 1 ofdma carrier, 16 qam, 10 mhz channel bw, 1024 fft. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution
adl5570 rev. 0 | page 5 of 12 pin configuration and fu nction descriptions 06729-002 pin 1 indicator 5 vcc1 6 rfin 7 gnd 8 v reg 15 rfout 16 nc nc = no connect 14 rfout 13 nc 9 c f l t 1 0 m o d e 1 1 n c 1 2 n c 3 g n d 4 s t b y 2 v c c 2 1 n c adl5570 top view (not to scale) figure 2. pin configuration table 3. pin function descriptions pin no. mnemonic description 1, 11 to 13, 16 nc no connect. do not connect these pins. 2 vcc2 this power supply pin should be connected to the supply via a choke circuit (see figure 10 ). 3, 7 gnd connected to ground. 4 stby when stby is low (0 v), the device operates in tr ansmit mode. when the radio is receiving data, stby can be taken high (2.5 v), reducing supply current to 1 ma. 5 vcc1 connect to power supply. 6 rfin matched rf input. 8 vreg when vreg is low, the device goes into sleep mode , reducing supply current to 10 a. when vreg is high (2.85 v), the device operates in its normal transmit mode. when high, vreg draws a bias current of approximately 10 ma. 9 cflt a ground-referenced capacitor should be connected to this pin to reduce bias line noise (see figure 10 ). 10 mode switches between high power and low power modes. when mode is low (0 v), the device operates in high power mode. when mode is high (2.5 v), the device operates in low power mode. see table 4 for appropriate biasing. in cases where the mode fe ature is not used, this pin should be connected to ground through a 50 k resistor. 14, 15 rfout unmatched rf output. these parall el outputs can be matched to 50 using strip-line and shunt capacitance. the power supply voltage should be connected to these pins through a choke inductor. exposed paddle the exposed paddle should be soldered down to a low impedance ground plane (if multiple ground layers are present, use multiple vias (9 minimum) to stitch together the ground planes) for optimum electrical and thermal performance. table 4. v cc = 3.5 v operating modes 1 mnemonic high power mode, p out > 10 dbm low power mode, p out 10 dbm standby mode sleep mode vreg high high high low mode low high x x stby low low high x 1 x = dont care. table 5. vreg, mode, and stby pins mnemonic nominal high (v) high range (v) nominal low (v) low range (v) vreg 2.85 2.75 to 2.95 0 na mode 2.5 >2.4 0 <1 stby 2.5 >2.4 0 <1
adl5570 rev. 0 | page 6 of 12 typical performance characteristics 06729-009 p out (dbm) current (a) 0 0.1 0.2 0.3 0.4 0.5 0.6 0 5 10 15 20 25 30 3.2v v cc 3.5v v cc 4.2v v cc figure 3. current vs. p out , 16 qam at 2.35 ghz and 31% duty cycle 06729-010 p out (dbm) evm (% rms) 0 1 2 3 4 5 6 0 5 10 15 20 25 30 +85c +25c ?40c figure 4. evm vs. p out , 16 qam 3/4 @ f = 2.35 ghz at v cc = 3.5 v 06729-011 1 2 3 4 5 ?30 ? 20 ?40 ?50 ?60 ?70 ?80 (db) ?90 ?100 ?110 ?120 center 2.35ghz bw 100khz span 45mhz 5s (1001 pts) vbw 100khz mkr x (ghz) y (dbm) 1 2.350 540 ?31.722 2 2.355 000 ?67.401 3 2.356 000 ?69.568 4 2.360 500 ?72.319 5 2.370 000 ?86.642 figure 5. wimax spectrum with fcc spectral mask at 2.35 ghz, v cc = 3.5 v, p out = 25 dbm 06729-012 frequency (mhz) gain (db) 23 24 25 26 27 28 29 30 31 32 2280 2300 2320 2340 2360 2380 2400 2420 ?40c +25c +85c 4.2v, 3.5v, 3.2v 4.2v, 3.5v, 3.2v 3.5v, 3.2v, 4.2v figure 6. gain vs. frequency, 16 qam at p in = ?2 dbm 06729-013 p out (dbm) gain (db) 23 25 27 29 31 33 0 5101520 25 30 4.2v, 3.5v, 3.2v 4.2v, 3.5v, 3.2v 3.5v, 3.2v, 4.2v ?40c +25c +85c figure 7. gain vs. p out at 2.35 ghz 06729-014 p out (dbm) evm (% rms) 0 1 2 3 4 5 7 6 0 5 10 15 20 25 30 3.2v v cc 3.5v v cc 4.2v v cc figure 8. evm vs. p out at f = 2.35 ghz
adl5570 rev. 0 | page 7 of 12 06729-015 1 2 3 4 5 ?30 ? 20 ?40 ?50 ?60 ?70 ?80 (db) ?90 ?100 ?110 ?120 center 2.35ghz bw 100khz span 45mhz 5s (1001 pts) vbw 100khz mkr x (ghz) y (dbm) 1 2.350 540 ?31.721 2 2.355 450 ?67.321 3 2.360 900 ?72.822 4 2.365 120 ?79.339 5 2.370 260 ?87.368 figure 9. wimax spectrum with wibro spectral mask at 2.35 ghz, v cc = 3.5 v, p out = 25 dbm
adl5570 rev. 0 | page 8 of 12 applications basic connections figure 10 shows the basic connections for the adl5570. c f l t m o d e n c n c vcc1 rfin gnd vreg rfout nc rfout nc 5 6 7 8 15 16 14 13 9 1 0 1 1 1 2 3 g n d 4 2 v c c 2 1 n c adl5570 s t b y c7 0.01f vpos vreg c9 0.01f c2 2.2pf c10 0.01f mode r1 50k ? c8 0.01f stby c6 3.6pf v pos c11 1f c5 open vpos1 c12 1f c4 39pf c3 3.3pf vpos1 vpos rfin rfout w1 l3 2.7nh l2 11nh l1 1nh 06729-003 nc = no connect figure 10. adl5570 basic connections power supply the voltage supply on the adl5570, which ranges from 3.2 v to 4.2 v, should be connected to the vccx pins. vcc1 is decoupled with capacitor c7, whereas vcc2 uses a tank circuit to prevent rf signals from propagating on the dc lines. rf input interface the rfin pin is the port for the rf input signal to the power amplifier. the l3 inductor, 2.7 nh, matches the input impedance to 50 . rfin 2.7nh l3 6 06729-004 figure 11. rf input with matching component rf output interface the parallel rf output ports have a shunt capacitance, c3 (3.3 pf), and the line inductance of the microstrip-line for optimized output power and linearity. the characteristics of the adl5570 are described for 50 impedance after the output matching capacitor (load after c3). rfout rfout c3 3.3pf c4 39pf l2 11pf c5 open c12 1f rfout v pos1 15 14 06729-005 figure 12. rf output c4 provides dc blocking on the rf output. transmit/standby enable during normal transmit mode, the stby pin is biased low (0 v). however, during receive mode, the pin can be biased high (2.5 v) to shift the device into standby mode, which reduces current consumption to less than 1 ma. vreg enable during normal transmit, the vreg pin is biased to 2.85 v and draws 10 ma of current. when the vreg pin is low (0 v), the device suspends itself into sleep mode (irrespective of supply and mode biasing). in this mode, the device draws 10 a of current. mode high power/low power enable the mode pin is used to choose between high power mode and low power mode. when mode is biased low (0 v), the device operates in high power mode. when mode is biased high (2.5 v), the device operates in low power mode. appropriate biasing must be followed for 3.5 v and 4.2 v operation. see table 4 and table 5 for configuration of the mode pin.
adl5570 rev. 0 | page 9 of 12 64 qam ofdma performance the adl5570 shows exceptional performance when used with a higher order modulation scheme, such as a 64 qam system. figure 13 , figure 14 , and figure 15 illuminate the evm, gain, and current consumption performance within the context of a 64 qam ofdma system. 06729-006 p out (dbm) evm (%) 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 0 5 10 15 20 25 30 35 2400mhz 2350mhz 2300mhz figure 13. evm vs. p out performance at v cc = 3.5 v and 64 qam ofdma signal 28 29 30 31 32 2280 2300 2320 2340 2360 2380 2400 2420 0 6729-007 frequency (mhz) gain (db) figure 14. gain vs. frequency performance at v cc = 3.5 v and 64 qam ofdma signal 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0 5 10 15 20 25 30 35 06729-008 p out (dbm) current (a) figure 15. burst current vs. p out at v cc = 3.5 v, 64 qam, 2350 mhz, 31% 802.16e ofdma signal power-added efficiency the efficiency of the adl5570 is defined on the current that it draws during the data burst of an 802.16e ofdma signal. in typical test setup, the average rms current, i avg , is measured. however, i avg = duty cycle (in decimal) i burst + (1 ? duty cycle [in decimal]) i default where: i burst is the rms current during the data burst of an ofdma signal. i default can be the quiescent current drawn when there is no data burst and the device remains biased, the sleep current (1 ma) if the device is defaulted to sleep mode, or the standby current. for example, in a 31% duty cycle 802.16e ofdma signal, the burst current is calculated by rearranging the previous equation to get 0.31 ) 0.69( default avg burst i i ? = finally, the pae is calculated by 100 (ma) (v) (mw) (mw) (%) ? = burst cc iv power inputrf power outputrf pae when rf = 2.35 ghz, 31% 16 qam ofdma signal, v cc = 3.5 v, rf output power = 25 dbm, and rf input power = ?4 dbm, the adl5570 consumes a burst current, i burst = 450 ma and pae = 21%.
adl5570 rev. 0 | page 10 of 12 evaluation board the evaluation board layout is shown in figure 16 . the adl5570 performance data was taken on a fr4 board. during board layout, 50 rf trace impedance must be ensured. the output matching capacitor, c3, is placed 30 mils from the package edge. 06729-016 figure 16. evaluation board layout table 6. evaluation board configuration options component function default value vpos, vpos1, gnd supply and ground connections. w1 = installed tp1 (stby) transmit/standby mode: when stby is low (0 v), the device operates in transmit mode. when the radio is receiving data, stby can be taken high (2.5 v), reducing the supply current to 10 ma. not applicable tp2 (vreg) normal/sleep mode: when vreg is low, the device goes into sleep mode, reducing the supply current to 10 a. wh en vreg is high (2.85 v), the device operates in its normal transmit mode. when high, vreg draws a bias current of approximately 10 ma. not applicable tp5 (mode), r1 high/low power mode: switches between high power mode and low power mode. when mode is low (0 v), the device operates in high power mode. when mode is high (2.5 v), the device operates in low power mode. r1 = 50 k (size 0402) l3 input interface: l3 matches the input to 50 . l3 = 2.7 nh (size 0402) c3, c4 output interface: c4 provides dc blocking, and c3 matches the output to 50 . c4 = 39 pf (size 0402) c3 = 3.3 pf (size 0402) (tight tolerance recommended) c2 filter interface: a ground-referenced capacitor should be connected to this node to reduce bias line noise. c2 = 2.2 pf (size 0402) c7 to c12 power supply decoupling: the capacitors, c7 through c12, are used for power supply decoupling. they should be placed as close as possible to the dut. c7 to c10 = 0.01 f (size 0402) c11, c12 = 1 f (size 0402) l1, l2, c6, c5 rf trap: l1, c6 and l2, c5 form tank ci rcuits and prevent rf from propagating on the dc supply lines. l1 = 1 nh (size 0402) c6 = 3.6 pf (size 0402) l2 = 11 nh (size 0402) c5 = open
adl5570 rev. 0 | page 11 of 12 measurement setup using the adl5570 evaluation board when using the adl5570 evaluation board, the following setup must be used: 1. connect the output of the wimax signal generator to the rf input through a cable. 2. connect the rf output sma of the adl5570 to the spectrum analyzer (preferably through an attenuator). 3. connect the power supply to vpos. set voltage to the desired supply level. be sure to keep the current limit on this source to 1 a. 4. ensure that jumper w1 is in place. alternatively, use a jumper cable to connect vpos to vpos1. 5. follow tabl e 4 for measurement in desired mode. 6. turn the rf source on. 7. turn all voltage supplies on.
adl5570 rev. 0 | page 12 of 12 outline dimensions compliant to jedec standards mo-220-vggc. 051507-d 1 0.65 bsc p i n 1 i n d i c a t o r 1.95 bcs 0.75 0.60 0.50 0.25 min 3.75 bsc sq top view 12 max 0.80 max 0.65 typ seating plane pin 1 indicator coplanarity 0.08 1.00 0.85 0.80 0.35 0.30 0.25 0.05 max 0.02 nom 0.20 ref 4.00 bsc sq 1.95 1.80 sq 1.65 16 5 13 8 9 12 4 exposed pad (bottom view) 0.60 max 0.60 max figure 17. 16-lead lead frame chip scale package [lfcsp_vq] 4 mm 4 mm body, very thin quad (cp-16-16) dimensions shown in millimeters ordering guide model temperature range package descriptio n package option ordering quantity ADL5570ACPZ-R7 1 ?40c to +85c 16-lead lfcsp_vq cp-16-16 1,500 adl5570-evalz 1 evaluation board 1 z = rohs compliant part. ?2007 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d06729-0-5/07(0)

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